The present invention relates to a technique for manufacturing a semiconductor integrated circuit device; and, more particularly, the invention relates to a technique which is effective when applied to the lithography processing used in a semiconductor integrated circuit device manufacturing process.
In the manufacture of a semiconductor integrated circuit device, a lithography technique is used as a method of transferring a fine pattern onto a semiconductor wafer. In such a lithography technique, a projection exposure system is used, and a pattern of a photomask (hereinafter referred to simply as xe2x80x9cmaskxe2x80x9d) attached to the projection exposure system is transferred onto a semiconductor wafer (simply xe2x80x9cwaferxe2x80x9d hereinafter) to form a device pattern.
A mask pattern of an ordinary mask, which the present inventors have studied, is formed by patterning a light shielding film of chromium (Cr), for example, formed on a transparent quartz substrate. For example, this patterning work for the light shielding film is performed in the following manner. First, an electron beam-sensitive resist is applied onto the light shielding film, and then a desired pattern is plotted to the electron beam-sensitive resist by means of an electron beam plotter, followed by development to form a resist pattern of a desired shape. Subsequently, using the resist pattern as an etching mask, the light shielding film is subjected to patterning by dry or wet etching, followed by removal of the resist pattern and subsequent washing, to form a light shielding pattern of a desired shape on the transparent quartz substrate.
Various mask structures have been proposed in line with the recent tendency toward improvement of the resolution attainable in the lithography process. For example, Japanese Published Unexamined Patent Application No. Hei 4(1992)-136854 discloses a technique using a halftone type phase shift mask as a means for improving the resolution of a single transparent pattern. According to the technique disclosed therein, a surrounding portion relative to a single transparent pattern is made translucent, that is, a light shielding portion of the mask is made translucent, and then, in this state, the phase of a very small amount of light passing through the translucent portion and having a sensitivity not higher than that of a photoresist and the phase of light passing through the transparent pattern are inverted. Since the light which has passed through the translucent film is inverted in phase with respect to the light which has passed through the transparent pattern serving as a main pattern, there occurs a phase inversion at the boundary portion, and the light intensity at the pattern boundary approaches zero. As a result, the ratio between the intensity of the light which has passed through the transparent pattern and that at the pattern boundary becomes relatively large, and so a light intensity distribution is obtained which is higher in contrast in comparison with a technique not using the translucent film. This halftone type phase shift mask corresponds to a mask in which the light shielding mask of the foregoing ordinary mask has been replaced with a halftone phase shift film, and it is fabricated by almost the same process as the ordinary mask manufacturing process referred to above.
Japanese Published Unexamined Patent Application No. Hei 5(1993)-289307 discloses a technique of forming a light shielding film by a resist film with a view toward attaining simplification and high accuracy of the mask manufacturing process. The method disclosed therein utilizes the property that an ordinary electron beam-sensitive resist or a photosensitive resist shields a vacuum ultraviolet light having a wavelength of approximately 200 nm or less. According to this method, it becomes unnecessary to use an etching step for a light shielding film and a resist removing step, thus providing a reduction of the cost, an improvement of the dimensional accuracy, and a decrease in the number of defects.
Japanese Published Unexamined Patent Application No. Sho 55(1980)-22864 discloses a masking technique for lithography using a pattern formed by a laminate of a metallic film and an organic material layer. According to the technique disclosed therein, a photoresist pattern for patterning a chromium layer on a main surface of a glass substrate is irradiated with argon ions and is thereby fixed to the chromium layer pattern, thereby improving the shielding effect against the exposure light.
Japanese Published Unexamined Patent Application No. Sho 60(1985)-85525 discloses a technique in which a photoresist is applied onto a mask having a defect to be remedied, and then a focused, charged particle beam is radiated onto a tiny area of the photoresist, which area is to remedy a defect in the mask, to form an opaque carbon film in that area.
Further, Japanese Published Unexamined Patent Application No. Sho 54(1979)-83377 discloses a technique in which an opaque emulsion is buried into a local defective portion of a photomask to effect the correction of pattern.
However, the present inventors have found that the foregoing masking techniques have the following inherent problems.
The change or modification of a mask pattern on a mask cannot be done quickly. In the semiconductor integrated circuit device manufacturing process, there sometimes is a case where a circuit pattern is changed or modified for realizing a semiconductor chip construction conforming to a specification requested by a customer, for meeting a customer""s request in product development or in manufacture, for rewriting memory information, for the adjustment of characteristics, or for the relief of a defective circuit. For example, Japanese Published Unexamined Patent Application No. Sho 63(1988)-274156 indicates that wiring should be changed frequently for writing information to a ROM (Read Only Memory) in the manufacture of a semiconductor integrated circuit device which incorporates the ROM. In an ordinary mask, however, the provision of a mask substrate and the deposition and patterning of a chromium film are required at every change or modification of the design of the mask, with the result in that the fabrication of the mask requires much time. Consequently, much time and labor are required for developing or manufacturing a semiconductor integrated circuit device.
Moreover, in the foregoing publications disclosing the technique of forming the light shielding pattern of mask using a resist film, there is no mention in the disclosure about problems involved in actually using the mask in the semiconductor integrated circuit device manufacturing process and about problems involved in manufacturing the mask, much less measures to solve such problems. For example, there are the following problems.
Firstly, it is difficult to detect predetermined patterns used in detecting various information, such as a mask alignment mark, a pattern measurement mark, and a product judgment mark. For example, in the mask defect inspecting system and exposure system presently in use, a halogen lamp is typically used for the alignment of the mask. Therefore, in case of attaching a mask to the defect inspecting system or exposure system, if a detection mark on the mask is formed of a resist film pattern, it is difficult to detect the pattern because the resist film is high in light transmittance and a high contrast cannot be obtained. As a result, it becomes difficult to effect alignment between the mask and the defect inspecting system or exposure system, making it impossible to effect the inspection and exposure in a satisfactory manner.
Secondly, dust particles are produced at the time of loading the mask to the defect inspecting system or exposure system. In the foregoing conventional techniques, at the time of loading the mask to the defect inspecting system or exposure system, the resist film of the mask comes into direct contact with a mask fixing member (e.g., vacuum fixing member) in the defect inspecting system or exposure system, with consequent breakage or chipping of the resist film, leading to the generation of dust particles. The dust particles thus generated may adhere to the surface of a lens used in the defect inspecting system or exposure system, or they may contaminate the interior of a chamber or adhere to the surface of a semiconductor wafer, which would cause deterioration of the pattern inspection accuracy or transfer accuracy, or a defect such as a short-circuit or open-circuit defect of a pattern may occur, resulting in the semiconductor integrated circuit being deteriorated in its reliability and yield.
Thirdly, in case of affixing a pellicle onto the mask, if a resist film is present at the portion where the pellicle is to be affixed, it is impossible to affix the pellicle in a satisfactory manner, and the pellicle becomes easy to peel off, and dust particles occur at the time of peeling of the pellicle.
It is an object of the present invention to provide a technique that is capable of shortening the time required for changing or modifying a mask pattern of a mask.
It is another object of the present invention to provide a technique that is capable of shortening the period for the development or the manufacture of a semiconductor integrated circuit device.
It is a further object of the present invention to provide a technique that is capable of improving an information detecting capability in a mask, wherein a resist film is allowed to function as a light shielding film.
It is a still further object of the present invention to provide a technique that is capable of suppressing or preventing the generation of dust particles in an exposure processing using a mask, wherein a resist film is allowed to function as a light shielding film.
The above and other objects and novel features of the present invention will become apparent from the following description and the accompanying drawings.
Typical aspects of the invention disclosed herein will be outlined below.
In one aspect of the present invention, there is a step of transferring a predetermined pattern to a resist film formed on a main surface of a semiconductor wafer by an exposure processing using a photomask formed on a main surface of a mask substrate, the photomask having a light shielding portion formed of a resist film and a light shielding formed of metal.
In another aspect of the present invention, the light shielding portion formed of the resist film is removed, and instead, a new light shielding portion comprised of a resist film is formed to modify or change the light shielding portion, and, thereafter, the aforesaid exposure processing is performed.
In a further aspect of the present invention, a light shielding portion is formed of metal along a peripheral portion of the main surface of the mask substrate and a pellicle is contacted and fixed onto the light shielding portion.
In a still further aspect of the present invention, a light shielding portion is formed of metal along the peripheral portion of the main surface of the mask substrate, and an opening is formed in the light shielding portion, thereby forming an information detecting pattern.